|
Technical Specifications |
Àü·ÂǰÁú ÃøÁ¤±âÁØ |
Conformance |
IEC 61999-1-4 Class 1, IEC 61000-4-30 Class A or B depending on measurement function, IEEE519, IEEE1159, IEEE1459 and EN50160 |
Clock/calendar |
Leap years, 2 4-hour clock |
½Ç½Ã°£½Ã°è Á¤È®µµ |
Not more than ¡¾ 1 s/day |
³»ºÎ¸Þ¸ð¸®¿ë·® |
At least 2 GB |
ÃÖ´ë ·¹ÄÚµù ±â°£ |
At least 31 days |
ÃøÁ¤½Ã°£ Á¶Á¤ |
Automatic |
ÃÖ´ë À̺¥Æ® ¼ö |
Limited only by the size of the internal memory |
Àü¿ø |
100 to 2 40 V rms ¡¾ 10 %, 47-63 Hz, 40 W |
Á¤Àü½Ã µ¿À۽ð£
(³»ºÎUPSµ¿ÀÛ) |
5 minutes per interruption, 60 minutes total operating time without recharging |
Å©±â |
215 mm x 310 mm x 35 mm (8.5 in x 12.2 in x 3.5 in) |
Áß·® (weight) |
6.3 kg (14 lb) |
|
ÀÔ·Â |
ÃøÁ¤Å¸ÀÔ |
One Phase Plus Neutral, One Phase IT No Neutral, One Phase Split Phase, Three Phase Wye, Three Phase Delta, Three Phase IT, Three Phase High Leg, Three Phase Open Leg, 2 Element Delta, 21/2 Element Wye |
ÀÔ·Âä³Î |
Voltage: 4 channels, ac/dc |
|
Current: 5 channels |
Àü¾Ðä³Î |
Input resistance: 2 M¥Ø |
|
Input capacitance: < 2 0 pF |
Àü·ùÀÔ·ÂÆ¯¼º |
2 V rms = full scale, 1 M¥Ø Input Impedance for ferro CTs, low impedance for Flexi-CTs |
ÃøÁ¤¹æ½Ä |
Simultaneous digital sampling of voltage and current. Digital PLL synchronized sampling, internal frequency reference used during voltage drops. |
|
µ¿±âÈ, »ùÇøµ |
PLL-synchronization source |
The PLL synchronizes to the A-N voltage for wye power types, and to the A-B voltage for delta power types. All listed power types can be characterized as either wye or delta. |
PLL lock range |
42.5 to 69 Hz |
Sampling frequency |
Voltage and current: 2 56 samples/cycle Inter-harmonics per IEC 61000-4-7: 2 560 points/10 cycles (50 Hz), 3072 points/12 cycles (60 Hz) Transient Voltage: 5 MHz |
A/D resolution |
Voltage and current: 2 4 bits |
|
Transient voltage: 14 bits |
|
Àü¾Ð, Àü·ùÃøÁ¤ |
Àü¾ÐÃøÁ¤¹üÀ§ |
AC voltage: 1000 V rms ¡¾ 10 % over range |
|
DC voltage: ¡¾ 1000 V + 10 % over range |
Àü¾Ð crest factor |
3 or less |
Àü·ùÃøÁ¤¹üÀ§ |
Depends on current probe used |
Àü·ù crest factor |
4 or less |
|
RMS Àü¾Ð |
ÃøÁ¤Å¸ÀÔ |
True rms calculated continuously: every cycle, every 1/2 cycle, and every 10 or 12 cycles at 50 or 60 Hz respectively, as required by IEC 61000-4-30. |
ÃøÁ¤ºÒÈ®µµ |
AC: ¡¾ 0.2 % reading ¡¾ 0.1 % full scale, above 50 V rms |
|
DC: ¡¾ 0.5 % reading ¡¾ 0.2 % full scale, above 50 V dc |
|
RMS Àü·ù |
ÃøÁ¤Å¸ÀÔ |
True rms calculated continuously: every cycle, every 1/2 cycle, and every 10 or 12 cycles at 50 or 60 Hz respectively, as required by standards |
|
°úµµÀü¾Ð (impulse) |
ÃøÁ¤Å¸ÀÔ |
Waveshape sampling |
Ç®½ºÄÉÀÏ |
8000 V pk |
»ùÇúÐÇØ´É |
200 nS |
ÃøÁ¤ºÒÈ®µµ |
¡¾ 5 % reading ¡¾ 2 0 V (test parameters: 1000 V dc, 1000 V rms, 100 kHz) |
|
Àü¾Ð Swell(rms swell) |
ÃøÁ¤Å¸ÀÔ |
True rms (one cycle calculation by overlapping each half cycle - voltage between lines is measured for 3P3W lines and phase voltage is measured for 3P4W lines) |
Ç¥½Ãµ¥ÀÌÅÍ |
Amplitude and duration of swell |
ÃøÁ¤ |
Same as rms voltage |
|
Àü¾Ð dip (rms sag) |
ÃøÁ¤Å¸ÀÔ |
True rms (one cycle calculation by overlapping each half cycle - voltage between lines is measured for 3P3W lines and phase voltage is measured for 3P4W lines) |
Ç¥½Ãµ¥ÀÌÅÍ |
Amplitude and duration of dip or interruption |
ÃøÁ¤ |
Same as rms voltage |
|
Voltage dropout (interruption) |
ÃøÁ¤Å¸ÀÔ |
Same as voltage dip |
|
LAN interface |
¿¬°á |
RJ-45 |
¼Óµµ ¹× ŸÀÔ |
10/100 Base-T, auto MDIX |
Åë½ÅÇÁ·ÎÅäÄÝ |
TCP/IP over Ethernet |
|
Wireless controller interface |
¿¬°á |
wireless (2.4 GHz radio) |
¼Óµµ |
up to 700 kbit/second |
Åë½ÅÇÁ·ÎÅäÄÝ |
Bluetooth SPP |
|
|
|
Àü·ÂÃøÁ¤ |
Àü¿ø, ¹èÅ͸®½Ã°£ |
|
True rms calculated continuously: every cycle, and every 10 or 12 cycles at 50 or 60 Hz respectively, as required by standards |
|
Á֯ļö |
ÃøÁ¤¹üÀ§ |
42.5 to 69 Hz |
ÃøÁ¤¼Ò½º |
Same as PLL synchronization source |
ÃøÁ¤Á¤È®µµ |
¡¾ 10 mHz (10 to 110 % of range, with sine wave) |
|
Power Factor |
ÃøÁ¤¹üÀ§ |
0..000 to 1.000 |
ÃøÁ¤Á¤È®µµ |
¡¾ 1 digit from the calculation of each measured value (¡¾3 digits for total) |
|
Displacement power factor |
ÃøÁ¤¹æ¹ý |
Calculated from the phase difference between voltage fundamental and current fundamental |
ÃøÁ¤¹üÀ§ |
- 1.000 (leading) to + 1.000 (lagging) |
ÃøÁ¤Á¤È®µµ |
¡¾ 0.5 % reading ¡¾ 2 % full scale ¡¾ 1 digit |
|
Voltage unbalance and phase sequence |
ÃøÁ¤¹æ¹ý |
Positive sequence voltage divided by negative sequence voltage, per IEC 61000-4-30 |
|
Harmonic voltage and current |
ºÐ¼®Ã¢ |
rectangular |
ºÐ¼®¼ø¼ |
1st to 50th order |
ÃøÁ¤Á¤È®µµ |
Voltage / Current: 1st to 2 0th orders: ¡¾ 0.5 % reading ¡¾ 0.2 % full scale, 2 1st to 50th orders: ¡¾ 1 % reading ¡¾ 0.3 % full scale (current sensor accuracy must be included for current and power) |
ÃøÁ¤¹æ¹ý |
IEC 61000-4-7 |
|
Inter-harmonic voltage and current (intermediate harmonics) |
Analysis window |
rectangular |
Analysis orders |
1.5 to 49.5th order |
ÃøÁ¤¹æ¹ý |
IEC 61000-4-7 |
|
Çø®Ä¿ |
¹æ¹ý |
IEC 61000-4-15 |
|
Plt for 2 hours and PSt for 10 minutes |
ÃøÁ¤¹üÀ§: |
0,1 to 5 (25) depending on voltage level, modulation and frequency |
|
|
|